Stressed crystal creates nanoscale patterns on chip materials at room temperature
A new chip-making technique uses a material’s crystal structure to create nanoscale patterns directly on hard materials used in devices, like silica.
This method could make it easier to create patterns on chips that handle both electronic and light-based signals, helping develop next-generation photonic and optoelectronic devices.
Materials scientists at Rice University used alpha-molybdenum trioxide, a semiconducting crystal with a special property called anisotropy.
This means the material behaves differently depending on the direction within it. When hit with an electron beam, the material deforms, creating nanoscale ripples. The researchers showed this process could be used to pattern silica and other hard materials used in electronics.
In a study published in Nature Communications, the research team placed a layer of the anisotropic crystal on top of silica and exposed both to an electron beam.
This caused the alpha-molybdenum trioxide to buckle under stress, while also softening the silica underneath.
“Hae Yeon Lee, an assistant professor of materials science and nanoengineering at Rice and a corresponding author on the study, explained, “Under an electron beam, the atomic bonds in silica can rearrange, so the material can slowly deform even at room temperature.
The challenge is that silica doesn’t deform by itself under the beam—it also needs a stress source. Our idea was to use the alpha-molybdenum trioxide as the stress source.”
The researchers exposed the material to an electron beam, which created directional stress that resulted in an organized pattern with evenly spaced ripples aligned with the crystal’s internal structure.
“In this work, we translate atomic-scale anisotropy into hundreds of nanometer-scale wrinkles,” Lee said.
These ripples are much smaller than the width of a human hair and can bend and split light, similar to the grooves on a CD that create rainbow colors.
This makes them useful as optical gratings, structures that guide light on a chip.
Hard materials often crack or form random defects when subjected to mechanical stress-based patterning.
Even though wrinkle-based patterning techniques can create nanoscale structures without the complicated manufacturing steps involved in standard chip fabrication, using them was generally thought to require soft, elastic substrates.
The Rice team’s work shows a new way to use wrinkle-based patterning on rigid insulating materials.
Also, the patterns can be adjusted by changing the thickness of the anisotropic layer or the strength of the electron beam.
“This work is useful because conventional methods for making nanoscale wrinkle-like patterns often require many fabrication steps, high costs, and chemical processing that can leave residue on the chip surface,” Lee said.
“With our method, the wrinkles are created in one simple step at room temperature.”
After the patterning is done, the alpha-molybdenum trioxide layer can be peeled off the silica.
The researchers saw similar effects on other common insulating materials, like aluminum oxide and silicon nitride, suggesting the method could work across a range of materials already used in semiconductor manufacturing.
The ability to create optical structures directly on standard chip materials could offer a simpler way to integrate light-based technologies into future devices.
Source: Rice University
